33889 Datasheet, PDF (20/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
V_SUP From 5.5 V to 18 V, V2INT from 4.75 to 5.25 V and T_J from -40°C to 150°C unless otherwise noted. Typical values
noted reflect the approximate parameter means at T_A = 25°C under nominal conditions unless otherwise noted.
Conditions
Symbol
Min
Typ
Max
Unit
Loop time Tx to Rx, no bus failure, MC33889D only ((27),
Figure 5) (ISO ICT test series 10)
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
t_LOOPRD
Loop time Tx to Rx, with bus failure, MC33889D only ((27),
Figure 6) (ISO ICT test series 10)
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
t_LOOPRD-F
Loop time Tx to Rx, with bus failure and +-1.5V gnd shift, 5
nodes network, MC33889D,((28), Figure 7, ISO ICT tests
series 11)
t_{LOOPRD/DR-F+GS}
µs
1.15
1.5
1.45
1.5
µs
-
1.9
-
1.9
3.6
µs
Min. Dominant Time For Wake-up On CANL or CANH
(Term Vbat; V_SUP = 12V) Guaranteed by design.
MC33889B
MC33889D
t_WAKE
µs
30
8.0
16
30
Failure 3 Detection Time (Normal Mode)
Failure 3 Recovery Time (Normal Mode)
Failure 6 Detection Time (Normal Mode)
Failure 6 Recovery Time (Normal Mode)
Failure 4, 7 Detection Time (Normal Mode)
Failure 4, 7 Recovery Time (Normal Mode)
Failure 3a, 8 Detection Time (Normal Mode)
Failure 3a, 8 Recovery Time (Normal Mode)
Failure 4, 7 Detection Time, (Term V_BAT; V_SUP = 12 V)
Failure 4, 7 Recovery Time (Term V_BAT; V_SUP = 12 V)
Failure 3 Detection Time (Term V_BAT; V_SUP = 12 V)
Failure 3 Recovery Time (Term V_BAT; V_SUP = 12 V)
Failure 3a, 8Detection Time (Term V_BAT; V_SUP = 12 V)
Failure 3a, 8 Recovery Time (Term V_BAT; V_SUP = 12 V)
t_DF3
t_DR3
t_DF6
t_DR6
t_DF47
t_DR47
t_DF8
tT_DR8
t_DR47
t_DR47
t_DR3
t_DR3
t_DR8
t_DR8
10
30
80
µs
160
µs
50
200
500
µs
150
200
1000
µs
0.75
1.5
4.0
ms
10
30
60
µs
0.75
1.7
4.0
ms
0.75
1.5
4.0
ms
0.8
1.2
8.0
ms
1.92
ms
3.84
ms
1.92
ms
2.3
ms
1.2
ms
Notes
27. AC characteristic according to ISO11898-3, tested per figure 5 and 6. Guaranteed by design, room temperature only.
28. AC characteristic according to ISO11898-3, tested per figure 7. Max reported is the typical measurement under the worst condition
(gnd shift, dominant/recessive edge, at source or destination node. ref to ISO test specification). Guaranteed by design, room
temperature only.
33889
20
Analog Integrated Circuit Device Data
Freescale Semiconductor