33889 Datasheet, PDF (51/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
LX2HS1
X
X
0
1
HS1AUTO
0
1
X
X
Wake-up inputs supplied by HS1
no
Yes, LX inputs sensed at sampling point
Autotiming HS1
off
On, HS1 cyclic, period defined in TIM2 register
Bit
Description
FWU
If this bit is set, and the SBC is turned into sleep or stop mode, the SBC wakes up after the time selected in the
TIM2 register
IDDS
Bit = 0: I_DDS-WU1 selected (lowest value, typ 3.5mA)
Bit = 1: I_DDS-WU2 selected (highest value, typ 14mA)
Table 31. INTR register
INTR
D3
D2
D1
D0
$111b
W
VSUPLOW
HS1OT-V2LOW
VDDTEMP
CANF
R
VSUPLOW
HS1OT
VDDTEMP
CANF
Reset
Reset condition
0
POR, RESET
0
POR, RESET
0
POR, RESET
0
POR, RESET
Table 32. Control bits:
Control bit
CANF
VDDTEMP
HS1OT-V2LOW
VSUPLOW
Description
Mask bit for CAN failures (OR of any CAN failure)
Mask bit for VDD medium temperature
Mask bit for HS1 over temperature OR V2 below 4V
Mask bit for SUP below 6.1V
When the mask bit has been set, INT pin goes low if the appropriate condition occurs.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
51