33889 Datasheet, PDF (41/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 8. List of Registers
Name Address
MCR
$0 0 0
RCR
$0 0 1
CAN
$0 1 0
IOR
$0 1 1
WUR
TIM
LPC
INTR
$1 0 0
$1 0 1
$1 1 0
$1 1 1
Description
Mode control register
Reset control register
CAN control register
I/O control register
Wake-up input register
Timing register
Low power mode
control register
Interrupt register
Comment and usage
Write: Control of normal, standby, sleep, and stop modes
Read: BATFAIL flag and other status bits and flags
Write: Configuration of reset voltage level, WD in stop mode, low power
mode selection
Read: CAN wake-up event, Tx permanent dominant
Write: CAN module control: TX/RX, Rec only, term VBAT, Normal and
extended modes, filter at L0 input.
Read: CAN failure status bits
Write: HS1 (high-side switch) control in normal and standby mode.
Gnd shift register level selection
Read: HS1 over temp bit, SHIFT bit (gnd shift above selection), V_SUP
below 6.1V, V2 below 4.0 V
Write: Control of wake-up input polarity
Read: Wake-up input, and real time LX input state
Write: TIM1, Watchdog timing control, window or Timeout mode.
Write: TIM2, Cyclic sense and force wake-up timing selection
Write: HS1 periodic activation in sleep and stop modes
Force wake-up control
Write: Interrupt source configuration
Read: INT source
Register description
Table 9. MCR Register
MCR
$000b
W
R
Reset
Reset condition
D3
BATFAIL
0
D2
MCTR2
VDDTEMP
0
POR, RESET
D1
MCTR1
GFAIL
0
POR, RESET
D0
MCTR0
WDRST
0
POR, RESET
Table 10. Control bits
MCTR2
0
0
0
0
MCTR1
0
0
1
1
MCTR0
0
1
0
1
SBC MODE
Enter/leave debug mode
Normal
Standby
Stop, watchdog off ⁽²⁾
DESCRIPTION
To enter debug mode, SBC must be in Normal or
Standby mode and BATFAIL⁽¹⁾ must be still at 1. To
leave debug mode, BATFAIL must be at 0.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
41