33889 Datasheet, PDF (49/60 Pages) Freescale Semiconductor, Inc – System Basis Chip with Low Speed Fault Tolerant CAN Interface

Table 26. Watch dog
WDW
0
0
0
0
1
1
1
1
WDT1
0
0
1
1
0
0
1
1
WDT0
0
1
0
1
0
1
0
1
Watchdog timing [ms]
10
50
100
350
10
50
100
350
Table 27. jWatchdog operation (window and timeout)
window closed
no watchdog clear
window open
for watchdog clear
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
no window watchdog
window watchdog enabled (window lenght is
half the watchdog timing)
window open
for watchdog clear
WD timing * 50%
WD timing * 50%
Watchdog period
(WD timing selected by TIM 1 bit WDW=1)
Window watchdog
Watchdog period
(WD timing selected by TIM 1, bit WDW=0)
Timeout watchdog
TIM2 REGISTER
The purpose of TIM2 register is to select an appropriate timing for sensing the wake-up circuitry or cyclically supplying devices
by switching on or off HS1
Table 28. TIM2 Register
TIM2
D3
D2
D1
D0
$101b
W
1
CSP2
CSP1
CSP0
R
Reset
0
0
0
Reset
condition
POR, RESET
POR, RESET
POR, RESET
Analog Integrated Circuit Device Data
Freescale Semiconductor
33889
49