MC68HC705E5 Datasheet, PDF (49/148 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
Operating Modes
Low-Power Modes
Refer to Figure 4-2 and to 4.10 Operation During Stop Mode for
additional information.
6.5.2 Wait Mode
The WAIT instruction places the MCU in a low power-consumption
mode, but the wait mode consumes more power than the stop mode. All
CPU action is suspended, but the timer, CPI, COP, SSI, and M bus
remain active. An interrupt from the timer, SSI, or M bus can cause the
MCU to exit the wait mode.
During the wait mode, the I bit in the CCR is cleared to enable interrupts.
All other registers, memory, and input/output lines remain in their
previous state. The timer, SSI, and/or IIC modules may be enabled to
allow a periodic exit from the wait mode.
Refer to Figure 4-2 and to 4.11 Operation During Wait Mode for
additional information.
6.5.3 Data-Retention Mode
The contents of RAM and CPU registers are retained at supply voltages
as low as 2.0 Vdc. This is called the data-retention mode where the data
is held, but the device is not guaranteed to operate. RESET must be held
low during data-retention mode.
MC68HC705E5 — Rev. 1.0
General Release Specification
Operating Modes
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