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MC68HC705E5 Datasheet, PDF (22/148 Pages) Freescale Semiconductor, Inc – General Release Specification
Freescale Semiconductor, Inc.
General Description
1.5.3 OSC1 and OSC2
These pins provide control input for an on-chip clock oscillator circuit
which can optionally drive a PLL clock. A crystal, a ceramic resonator, or
an external signal connects to these pins providing a system clock. The
oscillator frequency is two times the internal bus rate if the PLL is not
used.
Crystal
Figure 1-3 (a) shows the recommended circuit for using a crystal. The
crystal and components should be mounted as close as possible to
the input pins to minimize output distortion and startup stabilization
time.
Ceramic Resonator
A ceramic resonator may be used in place of the crystal in
cost-sensitive applications. Figure 1-3 (a) shows the recommended
circuit for using a ceramic resonator. The manufacturer of the
particular ceramic resonator being considered should be consulted
for specific information.
External Clock
An external clock should be applied to the OSC1 input with the OSC2
pin not connected (refer to Figure 1-3 (b)). This setup can be used if
the user does not wish to run the CPU with a 32.768-kHz crystal or
the PLL frequencies are not suitable for the application.
OSC1
MCU
OSC2
20 MΩ
330 kΩ
OSC1
MCU
OSC2
UNCONNECTED
10 pF
32.768 kHz
33 pF
< EXTERNAL CLOCK
(a) Crystal/Ceramic Resonator
Oscillator Connections
(b) External Clock Source
Connections
Figure 1-3. Oscillator Connections
General Release Specification
General Description
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MC68HC705E5 — Rev. 1.0