MC68HC705E5 Datasheet, PDF (143/148 Pages) Freescale Semiconductor, Inc – General Release Specification

Freescale Semiconductor, Inc.
General Release Specification — MC68HC705E5
Section 16. Mechanical Data
16.1 Contents
16.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143
16.3 28-Pin Plastic Dual-in-Line Package
(Case 710-02) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143
16.4 28-Pin Small Outline Integrated Circuit Package
(Case 751F-04) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .144
16.2 Introduction
This section describes the dimensions of the plastic dual in-line package
(PDIP) and small outline integrated circuit (SOIC) MCU packages.
16.3 28-Pin Plastic Dual-in-Line Package (Case 710-02)
28
1
A
HG
F
15
B
14
C
N
D
K
SEATING
PLANE
L
J
M
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
SHALL BE WITHIN 0.25mm (0.010) AT
MAXIMUM MATERIAL CONDITION, IN
RELATION TO SEATING PLANE AND
EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 36.45 37.21 1.435 1.465
B 13.72 14.22 0.540 0.560
C 3.94 5.08 0.155 0.200
D 0.36 0.56 0.014 0.022
F 1.02 1.52 0.040 0.060
G
2.54 BSC
0.100 BSC
H 1.65 2.16 0.065 0.085
J 0.20 0.38 0.008 0.015
K 2.92 3.43 0.115 0.135
L
15.24 BSC
0.600 BSC
M
0° 15°
0°
15°
N 0.51 1.02 0.020 0.040
MC68HC705E5 — Rev. 1.0
General Release Specification
Mechanical Data
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