MC7457RX1267LC Datasheet, PDF (19/71 Pages) Freescale Semiconductor, Inc – Microprocessor

Electrical and Thermal Characteristics
Table 9. Processor Bus AC Timing Specifications ¹
At recommended operating conditions. See Table 4.
Parameter
Symbol ²
Input setup times:
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,
TT[0:3], QACK, TA, TBEN, TEA, TS, EXT_QUAL,
PMON_IN, SHD[0:1], BMODE[0:1],
BMODE[0:1], BVSEL, L3VSEL
Input hold times:
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL, TT[0:3],
QACK, TA, TBEN, TEA, TS, EXT_QUAL, PMON_IN,
HD[0:1]
BMODE[0:1], BVSEL, L3VSEL
Output valid times:
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,
PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], TS,
SHD[0:1], WT
Output hold times:
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,
PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], TS,
SHD[0:1], WT
SYSCLK to output enable
SYSCLK to output high impedance (all except TS, ARTRY,
SHD0, SHD1)
SYSCLK to TS high impedance after precharge
Maximum delay to ARTRY/SHD0/SHD1 precharge
t_AVKH
t_DVKH
t_IVKH
t_MVKH
t_AXKH
t_DXKH
t_IXKH
t_MXKH
t_KHAV
t_KHDV
t_KHOV
t_KHAX
t_KHDX
t_KHOX
t_KHOE
t_KHOZ
t_KHTSPZ
t_KHARP
All Revisions and
Speed Grades
Min
Max
1.8
—
1.8
—
1.8
—
Unit Notes
ns
1.8
—
8
ns
0
—
0
—
0
—
0
—
8
ns
—
2.0
—
2.0
—
2.0
ns
0.5
—
0.5
—
0.5
—
0.5
—
ns
—
3.5
ns
—
1
t_SYSCLK 3, 4, 5
—
1
t_SYSCLK
3, 5
6, 7
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 8
Freescale Semiconductor
19