MC7457RX1267LC Datasheet, PDF (10/71 Pages) Freescale Semiconductor, Inc – Microprocessor

Comparison with the MPC7455, MPC7445, MPC7450, MPC7451, and MPC7441
Table 1. Microarchitecture Comparison (continued)
Microarchitectural Specs
MPC7457/MPC7447
MPC7455/MPC7445
Minimum misprediction penalty
6
6
Execution Unit Timings (Latency-Throughput)
Aligned load (integer, float, vector)
Misaligned load (integer, float, vector)
L1 miss, L2 hit latency
SFX (aDd Sub, Shift, Rot, Cmp, logicals)
Integer multiply (32 × 8, 32 × 16, 32 × 32)
Scalar float
VSFX (vector simple)
VCFX (vector complex)
VFPU (vector float)
VPER (vector permute)
3-1, 4-1, 3-1
4-2, 5-2, 4-2
9 data/13 instruction
1-1
3-1, 3-1, 4-2
5-1
1-1
4-1
4-1
2-1
3-1, 4-1, 3-1
4-2, 5-2, 4-2
9 data/13 instruction
1-1
3-1, 3-1, 4-2
5-1
1-1
4-1
4-1
2-1
MMUs
TLBs (instruction and data)
Tablewalk mechanism
Instruction BATs/data BATs
128-entry, 2-way
Hardware + software
8/8
128-entry, 2-way
Hardware + software
8/8
L1 I Cache/D Cache Features
Size
Associativity
Locking granularity
Parity on I cache
Parity on D cache
Number of D cache misses (load/store)
Data stream touch engines
32K/32K
8-way
Way
Word
Byte
5/1
4 streams
32K/32K
8-way
Way
Word
Byte
5/1
4 streams
On-Chip Cache Features
Cache level
Size/associativity
Access width
Number of 32-byte sectors/line
Parity
L2
L2
512-Kbyte/8-way
256-Kbyte/8-way
256 bits
256 bits
2
2
Byte
Byte
Off-Chip Cache Support ¹
MPC7450/MPC7451/
MPC7441
6
3-1, 4-1, 3-1
4-2, 5-2, 4-2
9 data/13 instruction
1-1
3-1, 3-1, 4-2
5-1
1-1
4-1
4-1
2-1
128-entry, 2-way
Hardware + software
4/4
32K/32K
8-way
Way
Word
Byte
5/1
4 streams
L2
256-Kbyte/8-way
256 bits
2
Byte
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 8
10
Freescale Semiconductor