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XR88C681_06 Datasheet, PDF (80/101 Pages) Exar Corporation – CMOS Dual Channel UART (DUART) | |||
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XR88C681
Figure 42 shows two DUART devices, a âReceiving
Deviceâ and a âTransmitting Deviceâ. These devices are
labeled such because of their role in this example transfer
of data between them. This example is going to ignore, for
the time being, the fact that the âReceiving Deviceâ has a
transmitter and that the âTransmitting Deviceâ has a
receiver. Further, this example, is using Channel A of the
âReceiving Deviceâ and Channel B of the âTransmitting
Deviceâ.
The example starts with the assumption that the
âReceiving Deviceâ has been programmed such that
MR1A[7] = 1. According to Section G.3, this results in
programming the âReceiving Deviceâ for Receiver RTS
Control. Additionally, the âTransmitting Deviceâ has been
programmed such that MR2B[4] = 1. According to
Section G.3, the Transmitter of Channel B of the
âTransmitting Deviceâ has now been programmed to be
under -CTSB input control. In this example, the
âReceiving Deviceâ controls the -RTSA output signal.
This output signal is fed directly into the -CTSB input of the
Transmitting Device.
If RHRA of the âReceiving Deviceâ is full (as depicted by
the FFULLA output being at a logic âhighâ), -RTSA will
automatically be negated by virtue of the Receiver
Controlled RTS features. Consequently, the Channel B
Transmitter of the âTransmitting Deviceâ will have its
-CTSB input negated and will not be permitted to transmit
any data to RXDA of the âReceiving Deviceâ.
If the CPU reads (or âpopsâ) the RHRA of the Receiving
Device, RHRA will no longer be full, and the FFULLA
indicator will toggle false. In this case, the FFULLA
indicator is connected to some input port of the CPU. In
response to the FFULLA toggling false, the CPU would
interpret this ânegative-edgeâ of FFULLA as an Interrupt
Request. The CPU would service this âInterruptâ by
âwritingâ [D7,...,D0] = [0, 0, 0, 0, 0, 0, 0, 1] to DUART
address 0E16. This action executes the âSET OUTPUT
PORT COMMANDâ and causes OPR[0] to toggle âhighâ
and Output Port pin OP0 (or -RTSA) to toggle âlowâ.
Consequently, -RTSA is now asserted.
With the -RTSA output of the âReceiving Deviceâ being
asserted the -CTSA input of the âTransmitting Deviceâ is
now asserted, as well and data transmission from the
âTransmitting Deviceâ to the âReceiving Deviceâ is now
permitted.
Figure 42 shows the RXDA input receiving data after
-RTSA has been asserted. However, in this example, this
newly received character now causes RHRA of the
âReceiving Deviceâ to be full. The FFULLA indicator
status is now asserted and RTSA (of the âReceiving
Deviceâ) is now automatically negated via the Receiver
control over the RTS signal. Therefore, transmission
from Channel B of the Transmitting Device is, once again,
inhibited.
Figure 43 presents a flow diagram illustrating an
algorithm that could be used in implementing the
Receiver-Controlled RTS/CTS Handshaking Mode.
Rev. 2.11
80
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