XR88C681_06 Datasheet, PDF (14/101 Pages) Exar Corporation – CMOS Dual Channel UART (DUART)

XR88C681
-R/W
-WR
E clock
-RD
-RESET
RESET
Figure 2. External Logic Circuitry required to interface a 6800 Family
Processor to the XR88C681 Device
B.1 DUART Register Addressing
The addressing of the internal registers of the DUART is presented in Table 1. Please note that some of the
registers are “Read Only” and others are “Write Only”. Each channel is provided with the following dedicated
(addressable) registers.
D Command Registers
D Mode Registers (MR1 and MR2)
D Status Registers
D Clock Select Registers
D Receiver Holding Register (RHR) and Transmit Holding Register (THR)
Additionally, the DUART contains the following registers that support/control both channels.
D Interrupt Status Register
D Interrupt Mask Register
D Masked Interrupt Status Register
D Interrupt Vector Register
D Auxiliary Control Register
And finally, the DUART also contains other registers that support functions other than serial data communication, such
as the parallel ports and the counters/timers.
D OPCR- Output Port Control Register
D IPCR - Input Port Configuration Register
D CTUR - Counter/Timer Upper Byte Register
D CTLR - Counter/Timer Lower Byte Register
Rev. 2.11
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