XR88C681_06 Datasheet, PDF (31/101 Pages) Exar Corporation – CMOS Dual Channel UART (DUART)

Figure 8 presents a schematic of the 8085 CPU Module.
XR88C681
AD0
AD1
AD2
AD3
AD4
X1
AD5
AD6
AD7
X2
TRAP
RST 7.5
RST 6.5
RST 5.5
INTR
-INTA
ALE
A8
A9
A10
A11
A12
A13
A14
A15
-IO/M
-RD
-WR
8085 CPU
D0
D1
D2
D3
D4
D5
D6
D7
1D
1Q
A0
2D
2Q
A1
3D
3Q
A2
4D
4Q
A3
5D
5Q
A4
6D
6Q
A5
7D
7Q
A6
8D
8Q
A7
C
74LS373
A8
A9
A10
A11
A12
A13
A14
A15
Figure 8. A Schematic of the 8085 CPU Module
-IOR
-MEMR
-IOW
-MEMW
Figure 9 illustrates an approach to interfacing the
XR88C681 DUART to the 8085 CPU module. Note that
the XR88C681 DUART, in this case, is memory mapped
(e.g., the signals -MEMR and -MEMW of the CPU module
are connected to the -RD and -WR pins of the DUART).
However, the user could have just as easily connected the
XR88C681 device to the CPU module’s I/O port (e.g, the
signal -IOR and -IOW of the CPU module are connected
to the -RD and -WR pins of the DUART, respectively).
Rev. 2.11
31