XR88C681_06 Datasheet, PDF (15/101 Pages) Exar Corporation – CMOS Dual Channel UART (DUART)

XR88C681
Address (Hex)
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
Read Mode Registers
Register Name
Symbol
Mode Register,
Channel A
MR1A, MR2A
Status Register,
Channel A
SRA
Masked Interrupt
Status Register
MISR
Rx Holding Register,
Channel A
RHRA
Input Port Change
Register
IPCR
Interrupt Status
ISR
Register
Counter/Timer Upper
Byte Register
CTU
Counter/Timer Lower
CTL
Byte Register
Mode Register,
Channel B
MR1B, MR2B
Status Register,
Channel B
SRB
RESERVED
Rx Holding Register,
Channel B
Interrupt Vector
Register
Input Port
RHRB
IVR
IP
Start Counter/Timer
Command
Stop Counter/Timer
Command
SCC
STC
Write Mode Registers
Register Name
Symbol
Mode Register,
Channel A
MR1A, MR2A
Clock Select Register,
Channel A
CSRA
Command Register A
CRA
Tx Holding Register,
Channel A
Auxiliary Control
Register
Interrupt Mask Register
THRA
ACR
IMR
Counter/Timer
Upper Byte Register
Counter/Timer Lower
Byte Register
Mode Register,
Channel B
Clock Select Register,
Channel B
Command Register,
Channel B
Tx Holding Register,
Channel B
Interrupt Vector
Register
Output Port
Configuration Register
(OP0 - OP7)
Set Output Port Bits
Command
Clear Output Port Bits
Command
CTU
CTL
MR1B, MR2B
CSRB
CRB
THRB
IVR
OPCR
SOPBC
COPBC
Table 1. DUART Port and Register Addressing
Note: The shaded blocks are not Read/Write registers but are rather “Address-Triggered” Commands.
Table 1 indicates that each channel is equipped with two Mode Registers. Associated with each of these Mode Register
pairs is a “Mode Register” pointer or MR pointer. Upon chip/system power up or RESET each MR pointer is “pointing to”
the channel MR1n register. (Please note that the suffix “n” is used at the end of many of the DUART registers symbols in
order to refer, generically, to either channels A or B). However, the contents of the MR pointer will shift from the address
of the MR1n register to that of the MR2n register, immediately following any Read or Write access to the MR1n register.
The MR pointer will continue to “point to” the MR2n register until a hardware reset occurs or until a “RESET MR
POINTER” command has been invoked. The “RESET MR POINTER” command can be issued by writing the
Rev. 2.11
15