M13S5121632A-2S Datasheet, PDF (46/48 Pages) Elite Semiconductor Memory Technology Inc. – Double-data-rate architecture, two data transfers per clock cycle

ESMT
PACKING DIMENSIONS
66-LEAD TSOP(II) DDR DRAM(400mil)
M13S5121632A (2S)
Symbol
A
A1
A2
b
b1
c
c1
D
ZD
E
E1
e
L
L1

1 
Dimension in inch
Min Norm Max
0.047
0.002 0.004 0.006
0.037 0.039 0.041
0.009
0.015
0.009 0.012 0.013
0.005
0.008
0.0047 0.005 0.006
0.875 BSC
0.028 REF
0.455 0.463 0.471
0.400 BSC
0.026 BSC
0.016 0.02 0.024
0.031 REF
0
8
10 
15 
20 
Dimension in mm
Min
Norm
Max
1.2
0.05
0.1
0.15
0.95
1
1.05
0.22
0.38
0.22
0.3
0.33
0.12
0.21
0.12 0.127 0.16
22.22 BSC
0.71 REF
11.56 11.76 11.96
10.16 BSC
0.65 BSC
0.4
0.5
0.6
0.80 REF
0
8
10 
15 
20 
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2014
Revision : 1.1
46/48