PD488588 Datasheet, PDF (46/79 Pages) Elpida Memory – 288M bits Direct Rambus DRAM

µPD488588
Figure 22-1 Control Registers (7/7)
Control Register : TEST77
Control Register : TEST78
Control Register : TEST79
Address : 04d16
Address : 04e16
Address : 04f16
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Read/write register.
Field
TEST77
TEST78
TEST79
Description
It must be written with zero after SIO reset. These registers must only be used for testing purposes.
Do not read or written after SIO reset.
Do not read or written after SIO reset.
Reset
value

0
0
46
Data Sheet E0039N30 (Ver. 3.0)