PD488588 Datasheet, PDF (23/79 Pages) Elpida Memory – 288M bits Direct Rambus DRAM

µPD488588
12. Precharge Mechanisms
Figure 12-1 shows an example of precharge with the ROWR packet mechanism. The PRER command must occur
a time tRAS after the ACT command, and a time tRP before the next ACT command. This timing will serve as a
baseline against which the other precharge mechanisms can be compared.
Figure 12-1 Precharge via PRER Command in ROWR Packet
a0 = {Da,Ba,Ra}
a5 = {Da,Ba}
b0 = {Da,Ba,Rb}
T₀ T₁ T₂ T₃ T₄ T₅ T₆ T₇ T₈ T₉ T₁₀ T₁₁T₁₂T₁₃ T₁₄ T₁₅ T₁₆T₁₇ T₁₈ T₁₉ T₂₀T₂₁ T₂₂ T₂₃ T₂₄T₂₅ T₂₆ T₂₇T₂₈T₂₉ T₃₀ T₃₁ T₃₂T₃₃ T₃₄ T₃₅ T₃₆T₃₇ T₃₈ T₃₉ T₄₀T₄₁ T₄₂ T₄₃T₄₄T₄₅ T₄₆ T₄₇
CTM/CFM
ROW2
..ROW0
ACT a0
COL4
..COL0
DQA8..0
DQB8..0
t_RAS
t_RC
PRER a5
ACT b0
t_RP
Figure 12-2 (top) shows an example of precharge with a RDA command. A bank is activated with an ROWA packet
on the ROW pins. Then, a series of four dualocts are read with RD commands in COLC packets on the COL pins.
The fourth of these commands is a RDA, which causes the bank to automatically precharge when the final read has
finished. The timing of this automatic precharge is equivalent to a PRER command in an ROWR packet on the ROW
pins that is offset a time tOFFP from the COLC packet with the RDA command. The RDA command should be treated
as a RD command in a COLC packet as well as a simultaneous (but offset) PRER command in an ROWR packet
when analyzing interactions with other packets.
Figure 12-2 (middle) shows an example of precharge with a WRA command. As in the RDA example, a bank is
activated with an ROWA packet on the ROW pins. Then, two dualocts are written with WR commands in COLC
packets on the COL pins. The second of these commands is a WRA, which causes the bank to automatically
precharge when the final write has been retired. The timing of this automatic precharge is equivalent to a PRER
command in an ROWR packet on the ROW pins that is offset a time tOFFP from the COLC packet that causes the
automatic retire. The WRA command should be treated as a WR command in a COLC packet as well as a
simultaneous (but offset) PRER command in an ROWR packet when analyzing interactions with other packets. Note
that the automatic retire is triggered by a COLC packet a time tRTR after the COLC packet with the WR command
unless the second COLC contains a RD command to the same device. This is described in more detail in Figure 15-
1.
Figure 12-2 (bottom) shows an example of precharge with a PREX command in an COLX packet. A bank is
activated with an ROWA packet on the ROW pins. Then, a series of four dualocts are read with RD commands in
COLC packets on the COL pins. The fourth of these COLC packets includes an COLX packet with a PREX
command. This causes the bank to precharge with timing equivalent to a PRER command in an ROWR packet on
the ROW pins that is offset a time tOFFP from the COLX packet with the PREX command.
Data Sheet E0039N30 (Ver. 3.0)
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