PD488588 Datasheet, PDF (39/79 Pages) Elpida Memory – 288M bits Direct Rambus DRAM

µPD488588
Table 22-1 Control Register Summary (2/2)
SA11..SA0 Register Field read-write/ read-only
Description
04716
PDNX PDNX
read-write, 13 bits
PDN exit. Specifies length of PDN exit phase A + phase B.
04816
TPARM TCAS
read-write, 2 bits
tCAS-C core parameter. Determines tOFFP datasheet parameter.
TCLS
read-write, 2 bits
tCLS-C core parameter. Determines tCAC and tOFFP parameters.
TCDLY0 read-write, 3 bits
tCDLY0-C core parameter. Programmable delay for read data.
04916
04a16
TFRM TFRM read-write, 4 bits
TCDLY1 TCDLY1 read-write, 3 bits
tFRM-C core parameter. Determines ROW - COL packet framing interval.
tCDLY-1 core parameter. Programmable delay for read data.
04c16
TCYCLE TCYCLE read-write, 14 bits
tCYCLE datasheet parameter. Specifies cycle time in 64ps units.
04b16
SKIP AS
read-only, 1 bit
Autoskip value established by the SETF command.
MSE
read-write, 1 bit
Manual skip enable. Allows the MS value to override the AS value.
MS
read-write, 1 bit
Manual skip value.
04d16-
TEST77 TEST77 read-write, 16 bits
Test register. Write with zero after SIO reset.
04e16-
TEST78 TEST78 read-write, 16 bits
Test register. Do not read or write after SIO reset.
04f16-
TEST79 TEST79 read-write, 16 bits
Test register. Do not read or write after SIO reset.
08016-Off16 reserved reserved vendor-specific
Vendor-specific test registers. Do not read or write after SIO reset.
Data Sheet E0039N30 (Ver. 3.0)
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