PD488588 Datasheet, PDF (19/79 Pages) Elpida Memory – 288M bits Direct Rambus DRAM

µPD488588
8. COL-to-COL Packet Interaction
Figure 8-1 shows three arbitrary packets on the
Figure 8-1 COL-to-COL Packet Interaction- Timing
COL pins. Packets “b” and “c” must be separated by
an interval tCCDELAY which depends upon the
T₀ T₁ T₂ T₃ T₄ T₅ T₆ T₇ T₈ T₉ T₁₀ T₁₁T₁₂T₁₃ T₁₄ T₁₅ T₁₆T₁₇ T₁₈ T₁₉ T
command and address values in all three packets.
CTM/CFM
Table 8-1 summarizes the tCCDELAY values for all
possible cases.
Cases CC1 through CC5 summarize the rules for
every situation other than the case when COPb is a
WR command and COPc is a RD command. In
CC3, when a RD command is followed by a WR
ROW2
..ROW0
COL4
..COL0
t_CCDELAY
COPa a1 COPb b1
COPc c1
command, a gap of tCAC - tCWD must be inserted
between the two COL packets. See Figure 4-1 for
DQA8..0
DQB8..0
more explanation of why this gap is needed. For
cases CC1, CC2, CC4, and CC5, there is no
Transaction a: COPa
Transaction b: COPb
Transaction c: COPc
a1 = {Da,Ba,Ca1}
b1 = {Db,Bb,Cb1}
c1 = {Dc,Bc,Cc1}
restriction (tCCDELAY is tCC).
In cases CC6 through CC10, COPb is a WR command and COPc is a RD command. The tCCDELAY value needed
between these two packets depends upon the command and address in the packet with COPa. In particular, in case
CC6 when there is WR-WR-RD command sequence directed to the same device, a gap will be needed between the
packets with COPb and COPc. The gap will need a COLC packet with a NOCOP command directed to any device in
order to force an automatic retire to take place. Figure 15-2 (right) provides a more detailed explanation of this case.
In case CC10, there is a RD-WR-RD sequence directed to the same device. If a prior write to the same device is
unretired when COPa is issued, then a gap will be needed between the packets with COPb and COPc as in case
CC6. The gap will need a COLC packet with a NOCOP command directed to any device in order to force an
automatic retire to take place.
Cases CC7, CC8, and CC9 have no restriction (tCCDELAY is tCC).
For the purposes of analyzing COL-to-ROW interactions, the PREC, WRA, and RDA commands of the COLC
packet are equivalent to the NOCOP, WR, and RD commands. These commands also cause a precharge operation
PREC to take place. This precharge may be converted to an equivalent PRER command on the ROW pins using the
rules summarized in Figure 12-2.
Table 8-1 COL-to-COL Packet Interaction - Rules
Case # COPa Da
Ba Ca1 COPb Db Bb Cb1 COPc Dc
CC1 xxxx xxxxx x..x x..x NOCOP Db Bb Cb1 xxxx xxxxx
CC2 xxxx xxxxx x..x x..x RD, WR Db Bb Cb1 NOCOP xxxxx
CC3 xxxx xxxxx x..x x..x RD
Db Bb Cb1 WR
xxxxx
CC4 xxxx xxxxx x..x x..x RD
Db Bb Cb1 RD
xxxxx
CC5 xxxx xxxxx x..x x..x WR
Db Bb Cb1 WR
xxxxx
CC6 WR == Db x x..x WR
Db Bb Cb1 RD
== Db
CC7 WR == Db x x..x WR
Db Bb Cb1 RD
/= Db
CC8 WR /= Db x x..x WR
Db Bb Cb1 RD
== Db
CC9 NOCOP == Db x x..x WR
Db Bb Cb1 RD
== Db
CC10 RD
== Db x x..x WR
Db Bb Cb1 RD
== Db
Bc Cc1 tCCDELAY
x..x x..x tCC
x..x x..x tCC
x..x x..x tCC + tCAC - tCWD
x..x x..x tCC
x..x x..x tCC
x..x x..x tRTR
x..x x..x tCC
x..x x..x tCC
x..x x..x tCC
x..x x..x tCC
Example
Figure 4-1
Figure 13-1
Figure 14-1
Figure 15-1
Data Sheet E0039N30 (Ver. 3.0)
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