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STC5423 Datasheet, PDF (58/60 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS
Revision History
STC5423
Synchronous Clock for SETS
Data sheet
The following table summarizes significant changes made in each revision. Additions reference current pages.
Revision
0.4
0.4.1
0.9
1.0
1.1
1.2
1.3
1.4
Change Description
Initial datasheet and minor releases at Preliminary status (For engineer samples).
Pages
See particular revision
First release at final status. (Completely revised for new design).
Add Clock Output Jitter section
Add G.8262 EEC Option1 and Option2
Correct description of the register 0x7F in Table 2
Add the section Master Clock Frequency
Remove word “reboot”
Correct description of tDd2 in Motorola Bus Read Timing
Correct description of tDd1 in Intel Bus Read Timing
Correct CS and RDB to WR in the description of Intel Bus Write Timing
Correct description of tALEd of Multiplex Bus Write Timing
Add more detail description to section Chip Master Clock
Add more detail description of the register MCLK_Freq_Reset
Change mechanical specifications due to assembly change
Correct SDI of SPI Bus Timing, Write access
Change definition of zero bucket size
Correct tCH and tCL, LSB to MSB and MSB to LSB in serial bus timing figure
Correct Min value of tCH and tCL to 50ns in serial bus timing table
Correct description of tCSHLD and tCSTRI in serial bus timing table
Update description of registers Control_Mode (0x20), Interrupt_Event_Sts (0x1A),
Interrupt_Event_Mask (0x1B), PLL_Event_Out (0x3E) and PLL_Event_In (0x3F)
Update description of registers Syth_Index_Select (0x4A), Synth_Freq_Value
(0x4B), Synth_Skew_Adj (0x4E)
Correct default value of register CLK8K_Sel (0x59) and CLK2K_Sel (0x5A)
Update Order Information
Miscellaneous
All pages
12
1, 14
10
11
17, 23, 49, 51
29
29
32
32
17
50, 51, 52
56
26
20, 34
25, 26
26
26
37, 39, 44, 45
45, 46
50
55
All pages
Page 58 of 60 TM114
Rev:1.4
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011