STC5423 Datasheet, PDF (52/60 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

STC5423
Synchronous Clock for SETS
Data sheet
Bit 7 ~ 0
0x11
0x22
0x44
0x88
External Oscillator Frequency Selection
10MHz
12.8MHz
19.2MHz
20MHz
Register Read:
Address
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
0x7F
FRQID
COUNT
ID_Written_Value
This register allows the user read back three values as follows:
FRQID
Indicates the ID of the frequency of MCLK that the STC5423 currently accept. Constant 1 can be read from
FRQID initially since the default accepted frequency for the STC5423 is 12.8MHz. The value of FRQID can
only be updated when three consecutive valid writes are written to the register MCLK_Freq_Rest completely.
Bit 7 ~ 6 FRQID
0
1
2
3
MCLK Frequency
10MHz
12.8MHz
19.2MHz
20MHz
COUNT
Indicates how many times this register has been written to. COUNT is set to 1 when each time a different valid
associated value is written to for the first time and is clear to 0 after three times valid writes are completed.
As described above in Register Writes, the associated value should be written to this register three times con-
secutively, with no intervening read/writes from/to other register. If the written value is invalid or the consecutive
writes operation is interrupted by reading/writing from/to other register, COUNT is clear to 0.
Bit 5 ~ 4
COUNT
0
1
2
3
Counter
No written or invalid
Once
Twice
Three times
ID_Written_Value
Indicates the ID of associated value that is being written to this register. The ID is updated when each time a
different valid associated value is written to this register for the first time.
Page 52 of 60 TM114
Rev:1.4
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011