STC5423 Datasheet, PDF (27/60 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

STC5423
Synchronous Clock for SETS
Data sheet
Motorola Bus
In Motorola mode, the device will interface to 680xx type processors. The CS, WR, A(0-6), AD(0-7) and RDY
pins are used. Timing is as follows in Figure 11 and Figure 12:
Motorola Bus Timing
t_CS
CS
t_RWs
t_CSd
t_RWh
WR
t_As
t_Ah
A0-A6
Address
AD0 - AD7
t_Dd1
t_Dd2
Data
RDY
t_RDYd1
t_RDY
t_RDYh
t_RDYd2
Figure 11: Motorola Bus Read Timing
Table 8: Motorola Bus Read Timing
Symbol
t_CS
t_CSd
t_RWs
t_RWh
t_As
t_Ah
t_Dd1
t_Dd2
t_RDYd1
t_RDY
t_RDYh
t_RDYd2
Description
CS low time
CS minimum high time between reads/writes
Read/write setup time
Read/write hold time
Address setup
Address hold
Data valid delay from CS low
Data high-z delay from CS high
CS low to RDY high delay
RDY high time
CS hold after RDY low
RDY high-z delay after CS high
Min
Max
Unit
50
ns
50
ns
0
ns
0
ns
10
ns
0
ns
50
ns
10
ns
13
ns
37
50
ns
0
ns
9
ns
Page 27 of 60 TM114
Rev:1.4
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011