STC5423 Datasheet, PDF (12/60 Pages) Connor-Winfield Corporation – Synchronous Clock for SETS

Input and Output Frequencies
STC5423
Synchronous Clock for SETS
Data sheet
Table 4: Acceptable Ref Input frequencies (REF1 and REF2)
Frequency
8 kHz
64 kHz
19.44 MHz
38.88 MHz
77.76 MHz
1.544 MHz
2.048 MHz
6.48 MHz
8.192 MHz
16.384 MHz
25 MHz
50 MHz
125 MHz
CLK
CLK1
CLK2
CLK8K
CLK2K
CLK3
CLK4
CLK5
CLK6
CLK7
Table 5: Available Clock Output Frequencies
CLK Level
LVPECL/LVDS
LVPECL/LVDS
LVCMOS
Synthesizer
G₁
G₂
F
F
Clock Output Frequency Range
1MHz ~ 156.25MHz, in 1kHz steps
1MHz ~ 156.25MHz, in 1kHz steps
8kHz
2kHz
LVCMOS
LVCMOS
LVCMOS
LVCMOS
LVCMOS
G₃ (T0) or G_T4(T4)
G₄ (T0) or G_T4 (T4)
G₅ (T0) or G_T4 (T4)
G₆ (T0) or G_T4 (T4)
G₇ (T0) or G_T4(T4)
1MHz ~ 156.25MHz, in 1kHz steps
1MHz ~ 156.25MHz, in 1kHz steps
1MHz ~ 156.25MHz, in 1kHz steps
1MHz ~ 156.25MHz, in 1kHz steps
1MHz ~ 156.25MHz, in 1kHz steps
Page 12 of 60 TM114
Rev:1.4
© Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Date: October 24, 2011