EPM240_10 Datasheet, PDF (82/88 Pages) Altera Corporation – MAX II Device Family Data

5–24
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
Table 5–31. MAX II IOE Programmable Delays
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
Parameter
Input Delay from Pin to
Internal Cells = 1
Input Delay from Pin to
Internal Cells = 0
Min Max Min Max Min Max Min Max Min Max Min Max Unit
— 1,225 — 1,592 — 1,960 — 1,858 — 2,171 — 2,214 ps
— 89 — 115 — 142 — 569 — 609 — 616 ps
Maximum Input and Output Clock Rates
Table 5–32 and Table 5–33 show the maximum input and output clock rates for
standard I/O pins in MAX II devices.
Table 5–32. MAX II Maximum Input Clock Rate for I/O
MAX II / MAX IIG
MAX IIZ
I/O Standard
3.3-V LVTTL
Without Schmitt
Trigger
With Schmitt
Trigger
3.3-V LVCMOS
Without Schmitt
Trigger
With Schmitt
Trigger
2.5-V LVTTL
Without Schmitt
Trigger
With Schmitt
Trigger
2.5-V LVCMOS
Without Schmitt
Trigger
With Schmitt
Trigger
1.8-V LVTTL
Without Schmitt
Trigger
1.8-V LVCMOS
Without Schmitt
Trigger
1.5-V LVCMOS
Without Schmitt
Trigger
3.3-V PCI
Without Schmitt
Trigger
–3 Speed –4 Speed –5 Speed –6 Speed –7 Speed –8 Speed
Grade
Grade
Grade
Grade
Grade
Grade Unit
304
304
304
304
304
304 MHz
250
250
250
250
250
250 MHz
304
304
304
304
304
304 MHz
250
250
250
250
250
250 MHz
220
220
220
220
220
220 MHz
188
188
188
188
188
188 MHz
220
220
220
220
220
220 MHz
188
188
188
188
188
188 MHz
200
200
200
200
200
200 MHz
200
200
200
200
200
200 MHz
150
150
150
150
150
150 MHz
304
304
304
304
304
304 MHz
MAX II Device Handbook
© August 2009 Altera Corporation