EPM240_10 Datasheet, PDF (70/88 Pages) Altera Corporation – MAX II Device Family Data

5–12
Chapter 5: DC and Switching Characteristics
Timing Model and Specifications
Table 5–16. IOE Internal Timing Microparameters
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
Symbol
Parameter
Min Max Min Max Min Max Min Max Min Max Min Max Unit
tFASTIO Data output delay — 159 — 207 — 254 — 170 — 348 — 428 ps
from adjacent LE
to I/O block
t_IN
I/O input pad and — 708 — 920 — 1,132 — 907 — 970 — 986 ps
buffer delay
t_GLOB (1) I/O input pad and — 1,519 — 1,974 — 2,430 — 2,261 — 2,670 — 3,322 ps
buffer delay used
as global signal pin
t_IOE
Internally
— 354 — 374 — 460 — 530 — 966 — 1,410 ps
generated output
enable delay
t_DL
Input routing delay — 224 — 291 — 358 — 318 — 410 — 509 ps
tOD (2) Output delay buffer — 1,064 — 1,383 — 1,702 — 1,319 — 1,526 — 1,543 ps
and pad delay
t_XZ (3) Output buffer
disable delay
— 756 — 982 — 1,209 — 1,045 — 1,264 — 1,276 ps
t_ZX (4) Output buffer
enable delay
— 1,003 — 1,303 — 1,604 — 1,160 — 1,325 — 1,353 ps
Notes to Table 5–16:
(1) Delay numbers for tGLOB differ for each device density and speed grade. The delay numbers for tGLOB, shown in Table 5–16, are based on an EPM240
device target.
(2) Refer to Table 5–32 and 5–24 for delay adders associated with different I/O standards, drive strengths, and slew rates.
(3) Refer to Table 5–19 and 5–14 for tXZ delay adders associated with different I/O standards, drive strengths, and slew rates.
(4) Refer to Table 5–17 and 5–13 for tZX delay adders associated with different I/O standards, drive strengths, and slew rates.
Table 5–17 through Table 5–20 show the adder delays for t_ZX and t_XZ microparameters
when using an I/O standard other than 3.3-V LVTTL with 16 mA drive strength.
Table 5–17. t_ZX IOE Microparameter Adders for Fast Slew Rate (Part 1 of 2)
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed
Grade
–6 Speed
Grade
–7 Speed
Grade
–8 Speed
Grade
Standard
Min Max Min Max Min Max Min Max Min Max Min Max Unit
3.3-V LVTTL 16 mA — 0 — 0 — 0 — 0 — 0 — 0 ps
8 mA — 28 — 37 — 45 — 72 — 71 — 74 ps
3.3-V LVCMOS 8 mA — 0 — 0 — 0 — 0 — 0 — 0 ps
4 mA — 28 — 37 — 45 — 72 — 71 — 74 ps
2.5-V LVTTL / 14 mA — 14 — 19 — 23 — 75 — 87 — 90 ps
LVCMOS
7 mA — 314 — 409 — 503 — 162 — 174 — 177 ps
1.8-V LVTTL / 6 mA — 450 — 585 — 720 — 279 — 289 — 291 ps
LVCMOS
3 mA — 1,443 — 1,876 — 2,309 — 499 — 508 — 512 ps
MAX II Device Handbook
© August 2009 Altera Corporation