EPM240_10 Datasheet, PDF (77/88 Pages) Altera Corporation – MAX II Device Family Data

Chapter 5: DC and Switching Characteristics
5–19
Timing Model and Specifications
Table 5–23. EPM240 Global Clock External I/O Timing Parameters (Part 2 of 2)
MAX II / MAX IIG
MAX IIZ
–3 Speed
Grade
–4 Speed
Grade
–5 Speed –6 Speed –7 Speed –8 Speed
Grade
Grade
Grade
Grade
Symbol Parameter Condition Min Max Min Max Min Max Min Max Min Max Min Max Unit
f_CNT
Maximum
global clock
—
— 304.0 — 247.5 — 201.1 — 184.1 — 123.5 — 118.3 MHz
(1)
frequency for
16-bit
counter
Note to Table 5–23:
(1) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay performs faster than this global clock
input pin maximum frequency.
Table 5–24 shows the external I/O timing parameters for EPM570 devices.
Table 5–24. EPM570 Global Clock External I/O Timing Parameters (Part 1 of 2)
MAX II / MAX IIG
MAX IIZ
–3 Speed –4 Speed –5 Speed –6 Speed –7 Speed –8 Speed
Grade
Grade
Grade
Grade
Grade
Grade
Symbol Parameter Condition Min Max Min Max Min Max Min Max Min Max Min Max Unit
tPD1
Worst case pin- 10 pF — 5.4 — 7.0 — 8.7 — 9.5 — 15.1 — 17.7 ns
to-pin delay
through 1 look-
up table (LUT)
t_PD2
Best case pin- 10 pF — 3.7 — 4.8 — 5.9 — 5.7 — 7.7 — 8.5 ns
to-pin delay
through 1 LUT
t_SU
Global clock
setup time
— 1.2 — 1.5 — 1.9 — 2.2 — 3.9 — 4.4 — ns
t_H
Global clock
hold time
—
0 — 0 — 0 — 0 — 0 — 0 — ns
t_CO
Global clock to 10 pF 2.0 4.5 2.0 5.8 2.0 7.1 2.0 6.7 2.0 8.2 2.0 8.7 ns
output delay
t_CH
Global clock
high time
— 166 — 216 — 266 — 253 — 335 — 339 — ps
t_CL
Global clock
low time
— 166 — 216 — 266 — 253 — 335 — 339 — ps
t_CNT
Minimum
— 3.3 — 4.0 — 5.0 — 5.4 — 8.1 — 8.4 — ns
global clock
period for
16-bit counter
© August 2009 Altera Corporation
MAX II Device Handbook