EPM240_10 Datasheet, PDF (32/88 Pages) Altera Corporation – MAX II Device Family Data

2–24
Figure 2–19. MAX II IOE Structure
Data_in Fast_out
Data_out OE
Chapter 2: MAX II Architecture
I/O Structure
DEV_OE
Optional
PCI Clamp (1)
V_CCIO V_CCIO
Programmable
Pull-Up
Drive Strength Control
Open-Drain Output
Slew Control
I/O Pin
Optional Bus-Hold
Circuit
Programmable
Input Delay
Optional Schmitt
Trigger Input
Note to Figure 2–19:
(1) Available in EPM1270 and EPM2210 devices only.
I/O Blocks
The IOEs are located in I/O blocks around the periphery of the MAX II device. There
are up to seven IOEs per row I/O block (5 maximum in the EPM240 device) and up to
four IOEs per column I/O block. Each column or row I/O block interfaces with its
adjacent LAB and MultiTrack interconnect to distribute signals throughout the device.
The row I/O blocks drive row, column, or DirectLink interconnects. The column I/O
blocks drive column interconnects.
MAX II Device Handbook
© October 2008 Altera Corporation