EPM240_10 Datasheet, PDF (4/88 Pages) Altera Corporation – MAX II Device Family Data

1–2
Chapter 1: Introduction
Features
Table 1–1 shows the MAX II family features.
Table 1–1. MAX II Family Features
Feature
EPM240 EPM570 EPM1270
EPM240G EPM570G EPM1270G
EPM2210
EPM2210G
EPM240Z EPM570Z
LEs
240
570
1,270
2,210
240
570
Typical Equivalent Macrocells
192
440
980
1,700
192
440
Equivalent Macrocell Range 128 to 240 240 to 570 570 to 1,270 1,270 to 2,210 128 to 240 240 to 570
UFM Size (bits)
8,192
8,192
8,192
8,192
8,192
8,192
Maximum User I/O pins
80
160
212
272
80
160
t_PD1 (ns) (1)
4.7
5.4
6.2
7.0
7.5
9.0
f_CNT (MHz) (2)
304
304
304
304
152
152
t_SU (ns)
1.7
1.2
1.2
1.2
2.3
2.2
t_CO (ns)
4.3
4.5
4.6
4.6
6.5
6.7
Notes to Table 1–1:
(1) tPD1 represents a pin-to-pin delay for the worst case I/O placement with a full diagonal path across the device and combinational logic
implemented in a single LUT and LAB that is adjacent to the output pin.
(2) The maximum frequency is limited by the I/O standard on the clock input pin. The 16-bit counter critical delay will run faster than this number.
f For more information about equivalent macrocells, refer to the MAX II Logic Element to
Macrocell Conversion Methodology white paper.
MAX II and MAX IIG devices are available in three speed grades: –3, –4, and –5, with
–3 being the fastest. Similarly, MAX IIZ devices are available in three speed grades: –6,
–7, and –8, with –6 being the fastest. These speed grades represent the overall relative
performance, not any specific timing parameter. For propagation delay timing
numbers within each speed grade and density, refer to the DC and Switching
Characteristics chapter in the MAX II Device Handbook.
Table 1–2 shows MAX II device speed-grade offerings.
Table 1–2. MAX II Speed Grades
Speed Grade
Device
EPM240
EPM240G
EPM570
EPM570G
EPM1270
EPM1270G
EPM2210
EPM2210G
EPM240Z
EPM570Z
–3
–4
–5
–6
–7
–8
v
v
v
—
—
—
v
v
v
—
—
—
v
v
v
—
—
—
v
v
v
—
—
—
—
—
—
v
v
v
—
—
—
v
v
v
MAX II Device Handbook
© August 2009 Altera Corporation