AK4695 Datasheet, PDF (98/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
CONTROL SEQUENCE
■ Clock Set up
When ADC, DAC or Programmable filters are powered-up, the clocks must be supplied.
Power Supply
PDN pin
PMVCM bit
(Addr:01H, D7)
MCKI pin
LRCK pin
BCKI pin
(1)
(2) (3)
(4)
(4)
Input
Input
Example:
: ^{Audio I/F Format: MSB justified (ADC and DAC)}
Input MCKI frequency: 256fs
Sampling Frequency: 48kHz
(1) Power Supply & PDN pin = “L”  “H”
(2)Addr:00H, Data:22H
(3) Addr:01H, Data:ECH
MCKI, BCKI and LRCK input
Figure 56. Clock Set Up Sequence
<Example>
(1) After Power Up, PDN pin “L” → “H”.
“L” time of 1.5μs or more is needed to reset the AK4695.
(2) Dummy Command (Addr: 00H, Data: 00H) must be executed (Sequential write is not available) before control
registers are set. DIF1-0 and FS3-0 bits must be set during this period.
(3) Power Up VCOM: PMVCM bit = “0” → “1”
VCOM must first be powered-up before operating other blocks. Rise-up time of the VCOM pin is 2ms (max)
when the external capacitance is 1μF.
(4) The AK4695 starts normal operation after MCKI, LRCK and BCKI inputs.
MS1463-E-01
- 98 -
2014/12