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AK4695 Datasheet, PDF (17/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP
[AK4695]
Parameter
Symbol min
typ
max
Unit
Digital Audio Interface Timing; fs = 8kHz ~ 48kHz, CL=100pF
DMCLK Output Timing
Period
tSCK
- 1/(64fs) -
ns
Rising Time
tSRise
-
-
10
ns
Falling Time
tSFall
-
-
10
ns
Duty Cycle
dSCK
45
50
55
%
Audio Interface Timing
DDAT Setup Time
tSDS
50
-
-
ns
DDAT Hold Time
tSDH
0
-
-
ns
Power-down & Reset Timing
PDN Accept Pulse Width
(Note 41)
tAPD
1.5
-
-
μs
PDN Reject Pulse Width
(Note 41)
tRPD
-
-
50
ns
PMAD0 or PMAD1 “” to SDTO1 valid
PMAD2 or PMAD3 “” to SDTO2 valid
(Note 42)
ADRST bit = “0”
tPDV
-
1059
-
1/fs
ADRST bit = “1”
tPDV
-
267
-
1/fs
Note 41. The AK4695 can be reset by bringing the PDN pin “L” upon power-up. The PDN pin must held “L” for more than
1.5µs for a certain reset. The AK4695 is not reset by the “L” pulse less than 50ns.
Note 42. This is the count of LRCK “↑” from the PMAD0 or PMAD1 bit (PMAD2 or PMAD3 bit) = “1”.
■ Timing Diagram
MCKI
LRCK
BCKI
1/fCLK
VIH
VIL
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
VIH
VIL
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
VIH
VIL
tBCKH
tBCKL
Figure 4. Clock Timing
MS1463-E-01
- 17 -
2014/12