AK4695 Datasheet, PDF (16/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
SWITCHING CHARACTERISTICS
(Ta =25C; AVDD=SVDD=2.5 ~ 3.5V, DVDD =1.6  2.0V, TVDD=(DVDD-0.2) ~ 3.5V; C_L=20pF)
Parameter
Symbol min
typ
max
MCKI Input Timing
Frequency
256fs
fCLK 2.048
-
12.288
512fs
fCLK 4.096
-
24.576
1024fs
fCLK 8.192
-
16.384
Pulse Width Low
tCLKL 0.4/fCLK -
-
Pulse Width High
tCLKH 0.4/fCLK -
-
LRCK Input Timing
Frequency
256fs
fs
8
-
48
512fs
fs
8
-
48
1024fs
fs
8
-
16
Duty
Duty
45
-
55
BCKI Input Timing
Period
8kHz ≤ fs ≤ 12kHz
tBCK
1.3
-
-
12kHz < fs ≤ 24kHz
tBCK
651
-
-
24kHz < fs ≤ 48kHz
tBCK
325
-
-
Pulse Width Low
tBCKL
130
-
-
Pulse Width High
tBCKH
130
-
-
Audio Interface Timing
LRCK Edge to BCKI “” (Note 38)
tLRB
50
-
-
BCKI “” to LRCK Edge (Note 38)
LRCK Edge to SDTO (MSB) (Except I²S mode)
tBLR
50
tLRD
-
-
-
-
80
BCKI “” to SDTO
tBSD
-
-
80
SDTI Hold Time
tSDH
50
-
-
SDTI Setup Time
tSDS
50
-
-
Control Interface Timing
CCLK Period
tCCK
200
-
-
CCLK Pulse Width Low
tCCKL
80
-
-
Pulse Width High
tCCKH
80
-
-
CDTIO Setup Time
tCDS
40
-
-
CDTIO Hold Time
CSN “H” Time
tCDH
40
-
-
tCSW
150
-
-
CSN Edge to CCLK “” (Note 39)
tCSS
50
-
-
CCLK “” to CSN Edge (Note 39)
tCSH
50
-
-
CCLK “” to CDTIO (at Read Command)
tDCD
-
-
70
CSN “” to CDTIO (Hi-Z) (at Read Command) (Note 40) tCCZ
-
-
70
Note 38. BICK rising edge must not occur at the same time as LRCK edge.
Note 39. CCLK rising edge must not occur at the same time as CSN edge.
Note 40. It is the time of 10% potential change of the CDTIO pin when RL=1k (pull-up to TVDD).
Unit
MHz
MHz
MHz
ns
ns
kHz
kHz
kHz
%
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MS1463-E-01
- 16 -
2014/12