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AK4695 Datasheet, PDF (69/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP | |||
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[AK4695]
AVDD
Connector
(Line Input)
AUXINL pin
(AUXINR pin)
typ.100kï
MIC-Amp
AVDD
VCOM
To ADC
22kï
LOUTA pin
(ROUTA pin)
1kï
typ.200kï
VCOM
Power-save Mode
Figure 46. Connection Example of when using a Same Connector for Both Line Input and Output
[Line Input Mode Control Sequence (in case of not using a Pop Noise Reduction Circuit)]
(1)
(5)
PMLO bit
LOPSA bit
0
(3)
LMODE bit
LOUTA pin
ROUTA pin
VCOM
Power-down
Normal
Operation
Power-save
(4)
Power-down
AUXINL pin
AUXINR pin
(2)
(2)
Figure 47. Line Input Mode Control Sequence (in case of not using a Pop Noise Reduction Circuit)
(1) Set PMLO bit = â1â. Stereo line output exits power-down mode.
LOUTA and ROUTA pins rise up to common voltage.
(2) Voltage Fluctuation period.
(3) Set LMODE bit = â0â after LOUTA and ROUTA pins rise up.
Line input is enabled.
(4) Set LMODE bit = â1â. Line input mode is disabled.
(5) Set PMLO bit = â0â. Stereo line output enters power-down mode.
LOUTA and ROUTA pins fall down.
MS1463-E-01
- 69 -
2014/12
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