AK4695 Datasheet, PDF (103/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
■ Stereo Line Output
FS3-0 bits
(Addr:00H, D3-0)
LVOL bit
(Addr:03H, D4)
DVLA7-0 bits
(Addr:0EH)
DAC Path
(Addr:12H)
LOPSA bit
(Addr:13H, D1)
PMDACA bit
PMLO bit
(Addr:1BH, D3,D0)
LOUTA pin
ROUTA pin
xxxx
(1)
0
84H
(2)
(3)
32H
(4)
0010
1
70H
22H
Example:
Audio I/F Format: MSB justified (ADC & DAC)
Sampling Frequency: 48kHz
Digital Volume B: 10dB
(1) Addr:00H, Data:22H
(2) Addr:03H, Data:10H
(3) Addr:0EH, Data:70H
(4) Addr:12H, Data:22H
(5) Addr:13H, Data:02H
(6) Addr:1BH, Data:09H
(5)
(7)
(7) Addr:13H, Data:00H
(8)
(10)
Playback
(6) ^{>300 ms}
(9) ^{>300 ms}
(8) Addr:13H, Data:02H
Normal Output
(9) Addr:1BH, Data:00H
(10) Addr:09H, Data:00H
Figure 61. Stereo Lineout Sequence
(Lineout Playback: SDTI  DVLA  DACA  LOUTA/ROUTA)
<Example>
At first, clocks should be supplied according to “Clock Set Up” sequence.
(1) Set up the sampling frequency (FS3-0 bits). DAC and Stereo Line-Amp must be powered-up in consideration of
VCOM rise time.
(2) Set up Stereo Line-Amp A Volume: LVOL bit = “0” → “1”
(3) Set up Digital Output Volume A (Addr: 0EH)
(4) Set up the path of SDTI → DACA → Stereo Line-Amp A: DASEL1-0 bits = “00”, DRCENA bit = “0” → “1”
(5) Enter Stereo Line-Amp A power save mode: LOPSA bit = “0” → “1”
(6) Power up DAC and Stereo Line-Amp A: PMDACA = PMLO bits = “0” → “1”
When PMLO bit is set to “1”, LOUTA and ROUTA pins rise up to the VCOM voltage. The rise time is 300ms
(max.) when C=1F and AVDD=2.8V.
(7) Exit Stereo Line-Amp A power save mode: LOPSA bit = “1” → “0”
LOPSA bit should be set after LOUTA and ROUTA pins rise up. LPUTA and ROUTA pins start outputting
sound data after this setting.
(8) Enter Stereo Line-Amp A power save mode: LOPSA bit: “0” → “1”
(9) Power down DAC and Stereo Line-Amp A: PMDACA = PMLO bits = “1” → “0”
When PMLO bit is set to “0”, LOUTA and ROUTA pins fall down to the VSS voltage. The fall time is 300ms
(max.) when C=1F and AVDD=2.8V.
(10) Exit Stereo Line-Amp A power save mode: LOPSA bit = “1” → “0”
LOPSA bit should be set to “0” after LOUT and ROUT pins fall down.
MS1463-E-01
- 103 -
2014/12