AK4695 Datasheet, PDF (31/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
2. Interface
The input data channel of the DDAT0 and DDAT1 pins are set by DCLKP bit. When DCLKP bit = “1, Lch data is input to
the decimation filter if the DMCLK pin= “H”, and Rch data is input if the DMCLK pin= “L”. When DCLKP bit = “0”, Rch
data is input to the decimation filter if the DMCLK pin= “H”, and Lch data is input if the DMCLK pin= “L”. The DMCLK
pin outputs “L” when DCLKE bit = “0”, and only supports 64fs. In this case, necessary clocks must be supplied to the
AK4695 for ADC operation. The output data through the Decimation and Digital Filters is 24bit full scale when the 1bit
data density is 0%~100%.
DCLKP bit
DMCLK = “H”
DMCLK = “L”
0
Rch
Lch
1
Lch
Rch
Table 18. Data Input/Output Timing with Digital MIC
(default)
DMCLK(64fs)
DDAT0 (Lch)
DDAT1 (Lch)
DDAT0 (Rch)
DDAT1 (Rch)
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Figure 21. Data Input/Output Timing with Digital MIC (DCLKP bit = “1”)
DMCLK(64fs)
DDAT0 (Lch)
DDAT1 (Lch)
DDAT0 (Rch)
DDAT1 (Rch)
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Valid
Data
Figure 22. Data Input/Output Timing with Digital MIC (DCLKP bit = “0”)
MS1463-E-01
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2014/12