AK4695 Datasheet, PDF (46/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
■ Signal Path Setting of Digital Block
The input signal to the programmable filter is selected by PFSEL bit.
PFSEL bit
Programmable Filter Input
0
ADC Output
(default)
1
SDTI Input
Table 33. Programmable Filter Input Signal Select
The output signal of SDTO1/SDTO2 is selected by PFSDO bit.
PFSDO bit
0
1
SDTO1/2 Output
ADC Output
Programmable Filter Output
Table 34. SDTO1/2 Output Signal Select
(default)
The input signal to DACA, DACB and DRC are selected by DASEL1-0 bits.
DASEL1 bit DASEL0 bit
DACA/B, DRC Input Signal
0
0
SDTI
(default)
0
1
SDTO1
1
0
SDTO2
1
1
N/A
Table 35. DACA/B, DRC Input Signal Select (N/A: Not available)
The input signal to DACA is selected by DRCENA bit.
DRCENA bit
0
1
DACA Input Signal
Selected by Table 35
DRC Output
Table 36. DACA Input Signal Select
(default)
The input signal to DACB is selected by DRCENB bit.
DRCENB bit
0
1
DACB Input Signal
Selected by Table 35
DRC Output
Table 37. DACB Input Signal Select
(default)
The input channel to DACB is selected by DACBS1-0 bits.
DACBS1 bit
0
0
1
1
DACBS0 bit DACB Lch Input Signal DACB Rch Input Signal
0
Lch Selected by Table 37 Rch Selected by Table 37
104H
1
Lch Selected by Table 37
“0” data
0
“0” data
Rch Selected by Table 37
104H
1
Rch Selected by Table 37 Lch Selected by Table 37
Table 38. DACB Input Channel Select
(default)
MS1463-E-01
- 46 -
2014/12