AK4695 Datasheet, PDF (91/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
Addr
31H
Register Name
DRC Mode Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0 DLMAT2 DLMAT1 DLMAT0 DRGAIN1 DRGAIN0 DRCC1 DRCC0
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
DRCC1-0: DRC Setting Enable (Table 63)
00: Disable (default)
01: Low
10: Middle
11: High
When DRCC1-0 bits = “00”, the audio data passes the DRC block by 0dB gain.
DRGAIN1-0: DRC Recovery Speed Setting (Table 65)
Default: “00”
DLMAT1-0: DRC Attenuation Speed Setting (Table 64)
Default: “000”
Addr
32H
Register Name
NS Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
DRCM1 DRCM0
0
NSLPF NSHPF NSCE
R
R
R/W
R/W
R
R/W
R/W
R/W
0
0
0
0
0
0
0
0
NSCE: Noise Suppression Setting Enable
0: Disable (default)
1: Enable
When NSCE bit = “0”, the audio data passes Noise Suppression block by 0dB gain.
NSHPF: HPF Coefficient Setting Enable of the Noise Suppression Block
0: Disable (default)
1: Enable
When NSHPF bit is “1”, the settings of NSHA13-0 bits and NSHB13-0 bits are valid. When NSHPF bit is “0”,
the audio data passes the HPF block by 0dB gain.
NSLPF: LPF Coefficient Setting Enable of the Noise Suppression Block
0: Disable (default)
1: Enable
When NSLPF bit is “1”, the settings of NSLA13-0 bits and NSLB13-0 bits are valid. When NSLPF bit is “0”,
the audio data passes the LPF block by 0dB gain.
DRCM1-0: DRC Input Signal Setting (Table 39)
Default: “00” (L = Lch, R = Rch)
Addr
33H
Register Name
NS Gain & ATT Control
R/W
Default
D7
D6
D5
D4
D3
0 NSGAIN2 NSGAIN1 NSGAIN0 0
R
R/W
R/W
R/W
R
0
0
0
1
0
D2
NSATT2
R/W
0
D1
NSATT1
R/W
0
D0
NSATT0
R/W
1
NSATT2-0: Noise Suppression Attenuation Speed Setting (Table 43)
Default: “001”
NSGAIN2-0: Noise Suppression Recovery Speed Setting (Table 46)
Default: “001”
MS1463-E-01
- 91 -
2014/12