AK4695 Datasheet, PDF (21/107 Pages) Asahi Kasei Microsystems – 24bit 4ch CODEC with MIC/HP/SPK/LINE-AMP

[AK4695]
OPERATION OVERVIEW
■ System Clock
The AK4695 operates on external slave mode. This mode is compatible with the interface of a normal audio CODEC.
Master clock can be input to the internal ADC and DAC directly from the MCKI pin without internal PLL circuit operation.
The external clocks required to operate the AK4695 are MCKI (256fs, 512fs or 1024fs), BCKI (32fs) and LRCK (fs).
The master clock (MCLK) must be synchronized with LRCK. The phase between these clocks is not important. Sampling
frequency and MCLK frequency can be selected by FS3-0 bits (Table 2).
Mode
0
1
2
4
5
10
12
Others
FS3 bit
0
0
0
0
0
1
1
FS2 bit FS1 bit FS0 bit
MCKI Input
Frequency
Sampling Frequency Range
0
0
0
8kHz ≤ fs ≤ 16kHz
0
0
1
256fs
16kHz < fs ≤ 32kHz
0
1
0
32kHz < fs ≤ 48kHz
1
0
0
8kHz ≤ fs ≤ 16kHz
1
0
1
512fs
16kHz < fs ≤ 32kHz
0
1
0
32kHz < fs ≤ 48kHz
1
0
0
1024s
8kHz ≤ fs ≤ 16kHz
Others
N/A
N/A
Table 2 MCKI Input Frequency and Sampling Frequency Setting
(default)
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise. The
out-of-band noise can be improved by using higher frequency of the master clock. The S/N of the DAC output through
LOUTA/ROUTA pins is shown in Table 3.
MCKI
S/N
(fs=8kHz, 20kHzLPF + A-weighted)
Mode0: 256fs
80dB
Mode4: 512fs
Mode12: 1024fs
92dB
Table 3. Relationship between MCKI and S/N of LOUTA/ROUTA pins
AK4695
MCKI
BCKI
LRCK
256fs, 512fs
or 1024fs
 32fs
1fs
DSP or P
MCLK
BCLK
LRCK
SDTO1
SDTO2
SDTI1
SDTI2
SDTI
SDTO
Figure 12. EXT Slave Mode
MS1463-E-01
- 21 -
2014/12