AK4648 Datasheet, PDF (88/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
Addr
03H
Register Name
Signal Select 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
LOVL LOPS MGAIN1 SPKG1 SPKG MINL SPKG2
0
R/W
R/W
R/W
R/W R/W
R/W
R/W
RD
0
0
0
0
0
0
0
0
MINL: Switch Control from MIN pin to Stereo Line Output
0: OFF (default)
1: ON
When PMLO bit is “1”, MINL bit is enabled. When PMLO bit is “0”, the LOUT/ROUT pins go to VSS1.
SPKG2-0: Speaker-Amp Output Gain Select (Table 65)
MGAIN1: MIC-Amp Gain Control (Table 22)
LOPS: Stereo Line Output Power-Save Mode
0: Normal Operation (default)
1: Power Save Mode
LOVL: Stereo Line Output Gain Select (Table 55, Table 57)
0: 0dB/+6dB (default)
1: +2dB/+8dB
Addr
04H
Register Name
Mode Control 1
R/W
Default
D7
D6
D5
D4
D3
D2
PLL3 PLL2 PLL1 PLL0 BCKO
0
R/W
R/W
R/W
R/W
R/W
RD
0
0
0
0
0
0
DIF1-0: Audio Interface Format (Table 17)
Default: “10” (Left justified)
BCKO: BICK Output Frequency Select at Master Mode (Table 11)
PLL3-0: PLL Reference Clock Select (Table 5)
Default: “0000”(LRCK pin)
D1
DIF1
R/W
1
D0
DIF0
R/W
0
MS0625-E-01
- 88 -
2007/06