AK4648 Datasheet, PDF (43/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
LRCK
0123
BICK(32fs)
SDTO(o)
0 15 14
9 10 11 12 13 14 15 0 1 2 3
8 7 6 5 4 3 2 1 0 15 14
SDTI(i)
0 15 14
0123
BICK(64fs)
SDTO(o)
15 14
8 7 6 5 4 3 2 1 0 15 14
15 16 17 18
31 0 1 2 3
210
15 14
SDTI(i)
15 14
210
15:MSB, 0:LSB
Lch Data
Don't Care
15 14
Figure 30. Mode 3 Timing
9 10 11 12 13 14 15 0 1
876543210
876543210
15 16 17 18
31 0 1
210
2 1 0 Don't Care
Rch Data
■ Mono/Stereo Mode
PMADL, PMADR and MIX bits set mono/stereo ADC operation. When MIX bit = “1”, EQ and FIL3 bits should be set to
“0”. ALC operation (ALC bit = “1”) or digital volume operation (ALC bit = “0”) is applied to the data in Table 19.
PMADL bit
0
0
1
1
PMADR bit MIX bit
ADC Lch data
ADC Rch data
0
x
All “0”
All “0”
1
x
Rch Input Signal
Rch Input Signal
0
x
Lch Input Signal
Lch Input Signal
1
0
Lch Input Signal
Rch Input Signal
1
(L+R)/2
(L+R)/2
Table 19. Mono/Stereo ADC operation (x: Don’t care)
(default)
■ Digital High Pass Filter
The ADC has a digital high pass filter for DC offset cancellation. The cut-off frequency of the HPF is 0.9Hz
(@fs=44.1kHz) and scales with sampling rate (fs). When PMADL bit = “1” or PMADR bit = “1”, the HPF of ADC is
enabled but the HPF of DAC is disabled. When PMADL=PMADR bits = “0”, PMDAC bit = “1”, the HPF of DAC is
enabled but the HPF of ADC is disabled.
MS0625-E-01
- 43 -
2007/06