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AK4648 Datasheet, PDF (111/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP | |||
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[AK4648]
â Mono signal output from Speaker-Amp
CLOCK
SPKMN bit
(Addr:21H, D6)
PMMIN bit
(Addr:00H, D5)
PMSPL/R bits
(Addr:00H, D7&D4)
DACS bit
(Addr:02H, D5)
MINS bit
(Addr:02H, D6)
SPPSN bit
(Addr:02H, D7)
SPLP pin
SPRP pin
SPLN pin
SPRN pin
Clocks can be stopped.
0
X
(1)
Example:
Stereo SPK Mode
(1) Addr:21H, Data:40H
(2)
(6)
(2) Addr:00H, Data:E0H
X
0
(3)
(7)
(4)
(5)
Hi-Z
Normal Output
Hi-Z
(3) Addr:02H, Data:60H
(4) Addr:02H, Data:E0H
Mono Signal Output
(5) Addr:02H, Data:60H
Hi-Z
HVDD/2 Normal Output HVDD/2 Hi-Z
(6) Addr:00H, Data:40H
(7) Addr:02H, Data:00H
Figure 78. âMIN-Amp à Speaker-Ampâ Output Sequence
<Example>
The clocks can be stopped when only MIN-Amp and Speaker-Amp are operating.
(1) Set up speaker output mode
a. Mono SPK Mode & High Power Mono SPK Mode: SPKMN bit = â0â
b. Stereo SPK Mode: SPKMN bit = â1â
(2) Power Up MIN-Amp and Speaker-Amp:
a. Mono SPK Mode (When Lch Speaker-Amp, SPLP/SPLN pins are used.): PMMIN = PMSPL bits = â0â
â â1â
b. Stereo SPK Mode or High Power Mono SPK Mode: PMMIN = PMSPL = PMSPR bits = â0â â â1â
(3) Disable the path of âDAC Ã SPK-Ampâ: DACS bit = â0â
Enable the path of âMIN Ã SPK-Ampâ: MINS bit = â0â â â1â
(4) Exit the power-save-mode of Speaker-Amp: SPPSN bit = â0â â â1â
(5) Enter the power-save-mode of Speaker-Amp: SPPSN bit = â1â â â0â
(6) Power Down MIN-Amp and Speaker-Amp: PMMIN = PMSPK bits = â1â â â0â
(7) Disable the path of âMIN Ã SPK-Ampâ: MINS bit = â1â â â0â
MS0625-E-01
- 111 -
2007/06
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