AK4648 Datasheet, PDF (28/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
MCKI
LRCK
BICK
1/fCLK
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
tBCKH
tBCKL
fMCK
VIH
VIL
VIH
VIL
Duty = tLRCKH x fs x 100
= tLRCKL x fs x 100
VIH
VIL
MCKO
50%TVDD
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 10. Clock Timing (PLL Slave mode; PLL Reference Clock = MCKI pin, Except DSP mode)
tLRCKH
VIH
LRCK
VIL
tLRB
VIH
BICK
VIL
(BCKP = "0")
VIH
BICK
(BCKP = "1")
VIL
tBSD
SDTO
MSB
50%TVDD
tSDS
tSDH
SDTI
VIH
MSB
VIL
Figure 11. Audio Interface Timing (PLL Slave mode, DSP mode; MSBS bit = “0”)
MS0625-E-01
- 28 -
2007/06