AK4648 Datasheet, PDF (17/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
Parameter
min
Stereo Input: LIN2/RIN2/LIN4/RIN4 pins; LIN3/RIN3 pins (AIN3 bit = “1”)
Maximum Input Voltage (Note 30)
-
Gain
LIN/RIN Æ LOUT/ROUT LOVL bit = “0”
−4.5
LOVL bit = “1”
-
LIN/RIN Æ HPL/HPR
HPG = 0dB
−4.5
LIN/RIN Æ SPLP/SPLN or SPRP/SPRN (Note 33)
ALC bit = “0”, SPKG2-0 bits = “000”
−0.07
ALC bit = “0”, SPKG2-0 bits = “001”
-
ALC bit = “0”, SPKG2-0 bits = “010”
-
ALC bit = “0”, SPKG2-0 bits = “011”
-
ALC bit = “0”, SPKG2-0 bits = “100”
-
ALC bit = “0”, SPKG2-0 bits = “101”
-
ALC bit = “1”, SPKG2-0 bits = “000”
-
ALC bit = “1”, SPKG2-0 bits = “001”
-
ALC bit = “1”, SPKG2-0 bits = “010”
-
ALC bit = “1”, SPKG2-0 bits = “011”
-
ALC bit = “1”, SPKG2-0 bits = “100”
-
ALC bit = “1”, SPKG2-0 bits = “101”
-
Full-differential Mono Input: IN4+/− pins (L4DIF bit = “1”)
Maximum Input Voltage (Note 31)
-
Gain
IN4+/− Æ LOUT/ROUT
LOVL bit = “0”
−10.5
(LODIF bit = “0”)
LOVL bit = “1”
-
IN4+/− Æ LOP/LON
LOVL bit = “0”
−4.5
(LODIF bit = “1”, Note 32) LOVL bit = “1”
IN4+/− Æ HPL/HPR
HPG = 0dB
IN4+/− Æ SPLP/SPLN or SPRP/SPRN
-
−10.5
ALC bit = “0”, SPKG2-0 bits = “000”
-6.09
ALC bit = “0”, SPKG2-0 bits = “001”
-
ALC bit = “0”, SPKG2-0 bits = “010”
-
ALC bit = “0”, SPKG2-0 bits = “011”
-
ALC bit = “0”, SPKG2-0 bits = “100”
-
ALC bit = “0”, SPKG2-0 bits = “101”
-
ALC bit = “1”, SPKG2-0 bits = “000”
-
ALC bit = “1”, SPKG2-0 bits = “001”
-
ALC bit = “1”, SPKG2-0 bits = “010”
-
ALC bit = “1”, SPKG2-0 bits = “011”
-
ALC bit = “1”, SPKG2-0 bits = “100”
-
ALC bit = “1”, SPKG2-0 bits = “101”
-
typ
1.98
0
+2
0
+4.43
+6.43
+10.65
+12.65
0
-6
+6.43
+8.43
+12.65
+14.65
+2
-4
3.96
−6
−4
0
+2
−6
-1.59
+0.41
+4.63
+6.63
-6
-12
+0.41
+2.41
+6.63
+8.63
-4
-10
max
-
+4.5
-
+4.5
+8.93
-
-
-
-
-
-
-
-
-
-
-
-
−1.5
-
+4.5
-
−1.5
+2.91
-
-
-
-
-
-
-
-
-
-
-
Units
Vpp
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Vpp
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Note 30. Maximum input voltage is proportional to AVDD voltage. Vin = 0.6 x AVDD (typ.).
Note 31. Maximum input voltage is proportional to AVDD voltage. Vin = (IN4+) − (IN4−) = 1.2 x AVDD (typ.).
The signals with same amplitude and inverted phase should be input to IN4+ and IN4− pins, respectively.
Note 32. Vout = (LOP) − (LON) at LODIF bit = “1”.
Note 33. Signals with same amplitude and phase are input to LIN and RIN at SPKMN bit = “0”. When the input signal is
LIN or RIN, these values subtract 6.02dB from the above value.
MS0625-E-01
- 17 -
2007/06