AK4648 Datasheet, PDF (106/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
4. EXT Slave Mode
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
MCKI pin
LRCK pin
BICK pin
(1)
(2) (3)
Example:
Audio I/F Format: MSB justified (ADC and DAC)
Input MCKI frequency: 256fs
Sampling Frequency: 44.1kHz
MCKO: Disable
(1) Power Supply & PDN pin = “L” Æ “H”
(4)
Input
(4)
Input
(2) Addr:04H, Data:02H
Addr:05H, Data:00H
(3) Addr:00H, Data:40H
MCKI, BICK and LRCK input
Figure 74. Clock Set Up Sequence (4)
<Example>
(1) After Power Up, PDN pin = “L” Æ “H”. “L” time of 150ns or more is needed to reset the AK4648.
The AK4648 should be operated as the recommended power-up/down sequence shown in “System Design
(Grounding and Power Supply Decoupling)” to avoid the pop noise at the speaker output, lineout output, and
headphone output.
(2) DIF1-0 and FS1-0 bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0” Æ “1”
VCOM should first be powered up before the other block operates.
(4) Normal operation starts after the MCKI, LRCK and BICK are supplied.
MS0625-E-01
- 106 -
2007/06