AK4648 Datasheet, PDF (36/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
b) PLL reference clock: BICK or LRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits ((x: Don’t care)
Table 7).
AK4648
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
DSP or μP
32fs or 64fs
1fs
BCLK
LRCK
SDTI
SDTO
Figure 20. PLL Slave Mode 2 (PLL Reference Clock: BICK pin)
AK4648
MCKO
MCKI
BICK
LRCK
SDTO
SDTI
≥ 32fs
1fs
DSP or μP
BCLK
LRCK
SDTI
SDTO
Figure 21. PLL Slave Mode 2 (PLL Reference Clock: LRCK pin)
The external clocks (MCKI, BICK and LRCK) should always be present whenever the ADC or DAC is in operation
(PMADL bit = “1”, PMADR bit = “1” or PMDAC bit = “1”). If these clocks are not provided, the AK4648 may draw
excess current and it is not possible to operate properly because utilizes dynamic refreshed logic internally. If the external
clocks are not present, the ADC and DAC should be in the power-down mode (PMADL=PMADR=PMDAC bits = “0”).
MS0625-E-01
- 36 -
2007/06