AK4648 Datasheet, PDF (107/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
5. EXT Master Mode
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
MCKI pin
M/S bit
(Addr:01H, D3)
LRCK pin
BICK pin
(1)
(4)
(2)
(3)
Example:
Audio I/F Format: MSB justified (ADC and DAC)
Input MCKI frequency: 256fs
Sampling Frequency: 44.1kHz
MCKO: Disable
(1) Power Supply & PDN pin = “L” Æ “H”
(2) MCKI input
(3) Addr:04H, Data:02H
Addr:05H, Data:00H
Input
Addr:01H, Data:08H
Output
BICK and LRCK output
(4) Addr:00H, Data:40H
Figure 75. Clock Set Up Sequence (5)
<Example>
(1) After Power Up, PDN pin = “L” Æ “H”. “L” time of 150ns or more is needed to reset the AK4648.
The AK4648 should be operated as the recommended power-up/down sequence shown in “System Design
(Grounding and Power Supply Decoupling)” to avoid the pop noise at the speaker output, lineout output, and
headphone output.
(2) MCKI should be input.
(3) After DIF1-0 and FS1-0 bits are set, M/S bit should be set to “1”. Then LRCK and BICK are output.
(4) Power Up VCOM: PMVCM bit = “0” Æ “1”
VCOM should first be powered up before the other block operates.
MS0625-E-01
- 107 -
2007/06