AK4648 Datasheet, PDF (83/119 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP/SPK-AMP

[AK4648]
SDA
SCL
S
start condition
P
stop condition
Figure 66. START and STOP Conditions
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
Figure 67. Acknowledge on the I²C-Bus
acknowledge
8
9
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 68. Bit Transfer on the I²C-Bus
MS0625-E-01
- 83 -
2007/06