AK8858 Datasheet, PDF (87/96 Pages) Asahi Kasei Microsystems – PS/SD Multi Format Video Decoder

[9.1.28] Sub Address 0x1B~0x21 “Reserved Register (R/W)”
Reserved register.
[AK8858]
[9.1.29] Status 1 Register (R) [Sub Address 0x22]
The AK8858 internal status register.
bit 7
bit 6
OVCOL PKWHITE
bit 5
SCLKMOD1
bit 4
SCLKMOD0
bit 3
COLKLON
bit 2
FRMSTD
Sub Address: 0x22
bit 1
bit 0
VLOCK NOSIG
Status 1 Register
BIT Register Name
bit 0 NOSIG
bit 1 VLOCK
bit 2 FRMSTD
bit 3 COLKILON
bit 4 SCLKMOD0
~~
bit 5 SCLKMOD1
bit 6 PKWHITE
bit 7 OVCOL
No Signal
VLOCK
Frame Standard
Color Killer ON
Clock Mode
Peak White Detection
Over Color Level
R/W Definition
Input signal indicator
R 0: Input signal present
1: Input signal absent
Input signal VLOCK synchronization status indicator
R 0: Input signal synchronized
1: Input signal non-synchronized
Input signal interlace status indicator
R 0: Input signal 525/625 interlaced
1: Input signal not 525/625 interlaced
Color killer status indicator
R
0: Color killer not operation
1: Color killer operation
In component decode mode, this bit is always 0.
Clock mode indicator
SCLKMOD[1:0]
R
00: Fixed-clock mode
01: Line-locked clock mode
10: Frame-locked clock mode
11: Reserved
Luminance decode result flow status indicator,
R
after passage through AGC block
0: Normal
1: Overflow
Color decode result flow status indicator,
R
after passage through ACC block
0: Normal
1: Overflow (excessive color signal input)
MS1230-E-00
- 87 -
2010/9