AK8858 Datasheet, PDF (2/96 Pages) Asahi Kasei Microsystems – PS/SD Multi Format Video Decoder

[AK8858]
Features
[1] Functional block diagram................................................................................................................................................ 6
[2] Pin assignment................................................................................................................................................................. 7
[3] Pin function description .................................................................................................................................................. 8
[3.1] Pin function................................................................................................................................................................ 8
[3.2] Output pin state ....................................................................................................................................................... 11
[4] Electrical specifications ................................................................................................................................................ 11
[4.1] Absolute maximum ratings .................................................................................................................................... 11
[4.2] Recommended operating conditions .................................................................................................................... 11
[4.3] DC characteristics ................................................................................................................................................... 12
[4.4] Analog characteristics ............................................................................................................................................ 12
[4.4.1] Input Range ....................................................................................................................................................... 12
[4.4.2] AAF (Anti-Aliasing Filter) ................................................................................................................................. 12
[4.4.3] Analog PGA ....................................................................................................................................................... 12
[4.4.4] ADC .................................................................................................................................................................... 13
[4.4.5] Current consumption ....................................................................................................................................... 13
[4.4.6] Crystal circuit block.......................................................................................................................................... 14
[5] AC Timing ....................................................................................................................................................................... 15
[5.1] Clock input............................................................................................................................................................... 15
[5.2] Clock output (DTCLK output) ................................................................................................................................. 15
[5.3] Output data timing................................................................................................................................................... 16
[5.4] Reset pulse .............................................................................................................................................................. 16
[5.5] Power-down release sequence .............................................................................................................................. 17
[5.6] Power-on sequence................................................................................................................................................. 18
[5.7] I2C bus input timing ................................................................................................................................................ 19
[5.7.1] Timing 1 ............................................................................................................................................................. 19
[5.7.2] Timing 2 ............................................................................................................................................................. 19
[6] Functional overview....................................................................................................................................................... 20
[7] Functional description................................................................................................................................................... 21
[7.1] Analog circuit description ...................................................................................................................................... 21
[7.1.1] CVBS signal decoding...................................................................................................................................... 22
[7.1.2] S(Y/C) video signal decoding........................................................................................................................... 22
[7.1.3] 525i/625i YPbPr component video signal decoding ...................................................................................... 22
[7.1.4] 525p/625p YPbPr component video signal decoding .................................................................................... 22
[7.2] Analog Interface ...................................................................................................................................................... 23
[7.3] Input Clock mode .................................................................................................................................................... 23
[7.4] Analog clamp circuit ............................................................................................................................................... 24
[7.5] Input video signal categorization........................................................................................................................... 27
MS1230-E-00
-2-
2010/9