AK8858 Datasheet, PDF (6/96 Pages) Asahi Kasei Microsystems – PS/SD Multi Format Video Decoder

[1] Functional block diagram
[AK8858]
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
TEST0 TEST1
XTI XTO
SELA SDA SCL PDN RSTN OE
Test Logic
Clock Module
Timing Controller
Digital PLL
Sync
Separation
Microprocessor
Interface
VBI
Decoding
CLAMP
MUX
CLAMP
CLAMP
AAF
APGA1
AAF
SH _APGA2
AAF
10-bit
ADC1
DPGA1
10-bit
ADC2
DPGA2
Decimation
Filter
YC
Separation
Luminance
Process
U Process
V Process
YUV
to
RGB
Output
Buffer
Reference
ATIO VRP VCOM VRN IREF
AVDD AVSS DVDD DVSS PVDD1 PVDD2
HD
VD_FLD
DVAL_FLD
NSIG
DTCLK
DATA[23:0]
MS1230-E-00
-6-
2010/9