AK8858 Datasheet, PDF (75/96 Pages) Asahi Kasei Microsystems – PS/SD Multi Format Video Decoder

[9.1.11] AGC & ACC Control Register (R/W) [Sub Address 0x0A]
AGC and ACC setting register.
[AK8858]
Sub Address: 0x0A
bit 7
bit 6
ACCFRZ
ACC1
Default Value
0
0
bit 5
ACC0
0
bit 4
AGCFRZ
0
bit 3
AGCC1
0
bit 2
AGCC0
0
Default Value: 0x00
bit 1
bit 0
AGCT1
AGCT0
0
0
AGC & ACC Control Register
BIT Register Name
bit 0 AGCT0
~
~
bit 1 AGCT1
AGC Time Constance
bit 2 AGCC0
~
~
bit 3 AGCC1
bit 4 AGCFRZ
bit 5 ACCT0
~
~
bit 6 ACCT1
bit 7 ACCFRZ
AGC Coring Control
AGC Freeze
ACC Time Constance
ACC Freeze
R/W Definition
AGC time constant (T) setting
(if disabled, PGA can be set manually).
AGCT[1:0]
R/W 00: Disable
01: Fast [T = 1Filed]
10: Middle [T = 7Filed]
11: Slow [T = 28Filed]
AGC non-sensing bandwidth (LSB) setting
AGCC[1:0]
R/W
00: ±2 LSB
01: ±3 LSB
10: ±4 LSB
11: No non-sensing band
AGC freeze function (ON/OFF) setting
R/W
(AGC set values are saved during freeze)
0: Non-frozen
1: Frozen
ACC time constant (T) setting
ACCT[1: 0]
R/W
00: Disable
01: Fast [T = 2Fields]
10: Middle [T =8Fields]
11: Slow [T = 30Fields]
ACC freeze function (ON/OFF) setting
R/W
(ACC set values are saved during freeze)
0: Non-frozen
1: Frozen
MS1230-E-00
- 75 -
2010/9