AK8858 Datasheet, PDF (13/96 Pages) Asahi Kasei Microsystems – PS/SD Multi Format Video Decoder

[4.4.4] ADC
Parameter
Resolution
Operating clock frequency
Intergral nonlinearity
Differential nonlinearity
S/N
Symbol Min Typ Max Units
RES
10
bit
54
FS
27
MHz
INL
DNL
±1.0 ±2.0 LSB
±0.5 ±1.0 LSB
SN
53
dB
S/(N+D)
Full scale Gain matching
ADC internal common voltage
ADC internal positive VREF
ADC internal negative VREF
*Fin = AIN input signal frequency
SND
IFGM
VCOM
VRP
VRN
52
dB
5
%
0.96
V
1.26
V
0.66
V
[AK8858]
Condition
Progressive decode : Y signal
Interlace decode : Y signal
Progressive decode : PbPr signal
Fin=1MHz*, FS=54MHz,
PGA GAIN default setting
Fin=1MHz*, FS=54MHz
PGA GAIN default setting
[4.4.5] Current consumption
(AVDD = DVDD = PVDD1 = PVDD2 = 1.8V, Ta = −40∼85˚C)
Parameter
Symbol Min Typ Max Units
Condition
(Active mode)
Total
Analog block
Digital block
I/O block
IDD
AIDD
DIDD
PIDD
110 151 mA
68
mA
60
mA
35
mA
28
mA
14
mA
ADC 3ch operational^(*1)
ADC 3ch operational^(*1)
YC: ADC 2ch operational^(*2)
CVBS: ADC 1ch operational^(*2)
(*1)
With crystal connected
Load condition: CL=15pF
(Power down mode)
Total
Analog block
SIDD
ASIDD
≤1 100 uA
≤1
uA
PDN=L(DVSS)^(*3)
Digital block
DSIDD
≤1
uA
I/O block
PSIDD
≤1
uA
(*1) _{Progressive YPbPr signal decode}
(*2) _{Reference value}
(*3) _{OE pin and RSTN pin must always be brought to the voltage polarity to be used or to ground level}
MS1230-E-00
- 13 -
2010/9